| PART |
Description |
Maker |
| ASMP5P23S04A ASM5P23S04AF-1-08-SR ASM5P23S04AF-1-0 |
23S SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
3.3V ‘SpreadTrak?/a> Zero Delay Buffer
3.3V ‘SpreadTrak Zero Delay Buffer
3.3V 隆庐SpreadTrak隆炉 Zero Delay Buffer
|
PulseCore Semiconductor
|
| ASM5I23S05AG-1-08-SR ASM5I23S09AF-1-16-SR ASM5I23S |
23S SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
3.3V 隆庐SpreadTrak隆炉 Zero Delay Buffer
3.3V ‘SpreadTrak Zero Delay Buffer
3.3V ‘SpreadTrak?/a> Zero Delay Buffer
|
PulseCore Semiconductor
|
| W15202 W152 W152-4G W152-1G W152-2G W152-11G W152- |
Spread Aware(TM)-designed to work with SSFTG reference signals
Spread Aware™, Eight Output Zero Delay Buffer PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
Spread Aware? Eight Output Zero Delay Buffer
Spread Aware?? Eight Output Zero Delay Buffer
Spread Aware垄芒, Eight Output Zero Delay Buffer
|
Cypress Semiconductor, Corp.
|
| ICS672M-02I ICS672M-02T ICS672-01 ICS672M-01 ICS67 |
QuadraClockQuadrature Delay Buffer QuadraClock⑩正交延迟缓冲器
QuadraClock?/a> Quadrature Delay Buffer
QuadraClock Quadrature Delay Buffer
QuadraClock⑩ Quadrature Delay Buffer
|
ICST[Integrated Circuit Systems]
|
| CY2509 CY2510ZC-1 CY250905 CY2510ZC-1T CY2509ZXC-1 |
Spread Aware Ten/Eleven Output Zero Delay Buffer( 十一输出零延迟缓冲器)
Spread Aware⑩, Ten/Eleven Output Zero Delay Buffer
Spread Aware? Ten/Eleven Output Zero Delay Buffer
Spread Aware?? Ten/Eleven Output Zero Delay Buffer
Spread Aware垄芒, Ten/Eleven Output Zero Delay Buffer
|
Cypress Semiconductor Corp.
|
| CY29774 CY29774AI CY29774AIT |
Clocks and Buffers : Clock Distribution
2.5V or 3.3V, 125-MHz, 14 Output Zero Delay Buffer(2.5V/3.3V, 125MHz, 14杈???跺欢杩???插?)
2.5V or 3.3V, 125-MHz, 14 Output Zero Delay Buffer(2.5V/3.3V, 125MHz, 14输出零延迟缓冲器)
|
Cypress Semiconductor Corp.
|
| CY23EP05SXI-1T CY23EP05SXC-1HT CY23EP05SXI-1HT CY2 |
2.5 V or 3.3 V,10-220-MHz, Low Jitter, 5 Output Zero Delay Buffer
2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
Cypress Semiconductor, Corp.
|
| 1505 1505-50B 1505-50G 1505-5B 1505-50A 1505-50C 1 |
Delay 300 /-15 ns, 5-TAP SIP delay line Td/Tr=3
Delay 100 /-5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 60 /-3 ns, 5-TAP SIP delay line Td/Tr=3
Delay 30 /-2 ns, 5-TAP SIP delay line Td/Tr=3
Fixed 5-tap passive SIP delay line
PASSIVE DELAY LINE, TRUE OUTPUT, PSIP7
Delay 70 /-3.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 75 /-3.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 90 /-5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 40 /-2.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 50 /-3 ns, 5-TAP SIP delay line Td/Tr=3
Delay 20 /-1.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 200 /-10 ns, 5-TAP SIP delay line Td/Tr=3
Delay 5 /-1 ns, 5-TAP SIP delay line Td/Tr=3
|
DATA DELAY DEVICES INC
|
| W13204 |
Spread Aware篓拢, Ten/Eleven Output Zero Delay Buffer
Spread Awarea, Ten/Eleven Output Zero Delay Buffer
|
Cypress Semiconductor
|
| UPD424280LLE-A80 UPD424280LLE-A70 UPD424280AG5M-80 |
x18 Fast Page Mode DRAM
Quad PLL Clock Generator with Serial Interface (I2C)
Low-Cost 3.3V Spread Aware™ Zero Delay Buffer
MediaClock™ MPEG Clock Generator with VCXO
MediaClock™ PDP Clock Generator
Field and Factory-Programmable Spread Spectrum Clock Generator for EMI Reduction
HOTLink II™ SMPTE Receiver Training Clock
3.3V Zero Delay Buffer x18快速页面模式的DRAM
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